Back to overview

A low-power correlator for wakeup receivers with algorithm pruning through early termination

Type of publication Peer-reviewed
Publikationsform Proceedings (peer-reviewed)
Author Ghanaatian Reza, Whatmough Paul N., Constantin Jeremy, Teman Adam, Burg Andreas,
Project Design of Energy Efficient and Wireless Communication Systems under Unreliable Silicon
Show all

Proceedings (peer-reviewed)

Title of proceedings 2016 IEEE International Symposium on Circuits and Systems (ISCAS)
Place Montréal, QC, Canada
DOI 10.1109/iscas.2016.7539142


A low-complexity, low-power digital correlator for wakeup receivers is presented. With the proposed algorithm, unnecessary computational cycles are dynamically pruned from the correlation using an early threshold check. For the algorithm, we provide a rigorous mathematical analysis for the associated complexity/performance trade-offs. Furthermore, a low overhead hardware architecture with early-termination capability is developed and implemented in a 0.18μm CMOS technology. The post layout power analysis shows that the presented architecture can reduce power by up to 32% when compared to the conventional architecture with negligible degradation in detection probability and without degradation in false-alarm probability.