nanotechnology; flexible substrate technologies; ferroelectric material; negative capacitance effect; subthermal switch; low voltage ferroelectric memory
Saeidi Ali, Jazaeri Farzan, Stolichnov Igor, Luong Gia V, Zhao Qing-Tai, Mantl Siegfried, Ionescu Adrian M (2018), Effect of Hysteretic and non-Hysteretic Negative Capacitance on Tunnel FETs DC Performance, in
accepted on Nanotechnology.
Daus Alwin, Vogt Christian, Münzenrieder Niko, Petti Luisa, Knobelspies Stefan, Cantarella Giuseppe, Luisier Mathieu, Salvatore Giovanni A., Tröster Gerhard (2017), Charge Trapping Mechanism Leading to Sub-60-mV/decade-Swing FETs, in
IEEE Transactions on Electron Devices , 64, 2789.
Daus Alwin, Lenarczyk Pawel, Petti Luisa, Münzenrieder Niko, Knobelspies Stefan, Cantarella Giuseppe, Vogt Christian, Salvatore Giovanni A., Luisier Mathieu, Tröster Gerhard (2017), Ferroelectric‐Like Charge Trapping Thin‐Film Transistors and Their Evaluation as Memories and Synaptic Devices, in
Advanced Electronic Materials, 1700309.
Daus Alwin, Han S., Knobelspies Stefan, Cantarella Giuseppe, Vogt Christian, Münzenrieder Niko, Tröster Gerhard (2017), Flexible CMOS electronics based on p-type Ge2Sb2Te5 and n-type InGaZnO4 semiconductors, in
IEEE International Electron Devices Meeting (IEDM), San Francisco, USIEEE conference proceeding, San Francisco, US.
Saeidi Ali, Jazaeri Farzan, Bellando Francesco, Stolichnov Igor, Luong Gia V, Zhao Qing-Tai, Mantl Siegfried, Enz Christian C, Ionescu Adrian M (2017), Negative Capacitance as Performance Booster for Tunnel FETs and MOSFETs: An Experimental Study, in
IEEE Electron Device Letters, 38(10), 1485-1488.
Saeidi Ali, Jazaeri Farzan, Bellando Francesco, Stolichnov Igor, Enz Christian C, Ionescu Adrian M (2017), Negative capacitance field effect transistors; capacitance matching and non-hysteretic operation, in
Solid-State Device Research Conference (ESSDERC), 2017 47th European, 78-81, IEEE conference proceeding, Leuven, Belgium78-81.
Saeidi Ali, Jazaeri Farzan, Stolichnov Igor, Luong Gia Vinh, Zhao Qing-Tai, Mantl Siegfried, Ionescu Adrian M (2017), Negative Capacitance Tunnel FETs: Experimental Demonstration of Outstanding Simultaneous Boosting of On-current, Transconductance, Overdrive, and Swing, in
Silicon Nanoelectronic Workshop, (EPFL-CONF-), IEEE conference proceeding, Kyoto, Japan(EPFL-CONF-).
P. Lenarczyk and M. Luisier (2016), Physical modeling of ferroelectric field-effect transistors in the negative capacitance regime, in
Int. Conf. Sim. of Semicond. Proc. Dev. (SISPAD), 2016, Germany, 2016IEEE, USA.
Rusu Alexandru, Saeidi Ali, Ionescu Adrian M (2016), Condition for the negative capacitance effect in metal--ferroelectric--insulator--semiconductor devices, in
Nanotechnology, 27(11), 115201-115201.
Saeidi Ali, Jazaeri Farzan, Stolichnov Igor, Ionescu Adrian M (2016), Double-gate negative-capacitance MOSFET with PZT gate-stack on ultra thin body SOI: An experimentally calibrated simulation study of device performance, in
IEEE Transactions on Electron Devices, 63(12), 4678-4684.
Saeidi A, Biswas A, Ionescu Adrian M (2016), Modeling and simulation of low power ferroelectric non-volatile memory tunnel field effect transistors using silicon-doped hafnium oxide as gate dielectric, in
Solid-State Electronics, 124, 16-23.
Daus Alwin, Vogt Christian, Münzenrieder Niko, Petti Luisa, Knobelspies Stefan, Cantarella Giuseppe, Luisier Mathieu, Salvatore Giovanni A., Tröster Gerhard (2016), Positive charge trapping phenomenon in n-channel thin-film transistors with amorphous alumina gate insulators, in
Journal of Applied Physics , 120, 244501.
Saeidi Ali, Jazaeri Farzan, Stolichnov Igor, Enz Christian C, Ionescu Adrian M, Design Considerations of Ferroelectric Properties for Negative Capacitance MOSFETs, in
accepted on Electron Devices Technology and Manufacturing conference 2018.
In this proposal we will explore novel devices and technologies based on the concept of negative capacitance, that serve as alternatives for low power low voltage digital circuits and memories, exploiting ferroelectric gate stacks on silicon and/or on flexible substrates. We focus the proposed research on two levels, corresponding to the potential applications of the new negative capacitance (NC) devices: (i) NC ferroelectric devices on bulk silicon, targeting low power applications operating below 1GHz and (ii) NC ferroelectric devices on flexible substrates (Kapton) targeting 13MHz passive RFID tags.