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Hardware Architecture for List Successive Cancellation Decoding of Polar Codes

Publikationsart Peer-reviewed
Publikationsform Originalbeitrag (peer-reviewed)
Publikationsdatum 2014
Autor/in Balatsoukas-Stimming Alexios, Raymond Alexandre J., Gross Warren J., Burg Andreas,
Projekt Efficient Application Specific Integrated Circuits for Decoding Polar Codes
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Originalbeitrag (peer-reviewed)

Zeitschrift IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
Volume (Issue) 61(8)
Seite(n) 609 - 613
Titel der Proceedings IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
DOI 10.1109/TCSII.2014.2327336

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