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SOT-MRAM 300MM Integration for Low Power and Ultrafast Embedded Memories

Type of publication Peer-reviewed
Publikationsform Original article (peer-reviewed)
Author Garello K., Yasin F., Couet S., Souriau L., Swerts J., Rao S., Beek S. Van, Kim W., Liu E., Kundu S., Tsvetanova D., Croes K., Jossart N., Grimaldi E., Baumgartner M., Crotti D., Fumémont A., Gambardella P., Kar G. S.,
Project Spin-orbitronics in ferromagnets and antiferromagnets
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Original article (peer-reviewed)

Journal 2018 IEEE Symposium on VLSI Circuits
Page(s) 81 - 82
ISBN 2158-5601
Title of proceedings 2018 IEEE Symposium on VLSI Circuits
DOI 10.1109/vlsic.2018.8502269

Open Access

URL https://arxiv.org/abs/1810.10356
Type of Open Access Repository (Green Open Access)

Abstract

We demonstrate for the first time full-scale integration of top-pinned perpendicular MTJ on 300 mm wafer using CMOS-compatible processes for spin-orbit torque (SOT)-MRAM architectures. We show that 62 nm devices with a W-based SOT underlayer have very large endurance (> 5×1010), sub-ns switching time of 210 ps, and operate with power as low as 300 pJ.
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